1/9 july 2001 n high speed: t pd =4.4ns (typ.) at v cc = 3.3v n 5v tolerant inputs n power-down protection on inputs n input voltage level: v il = 0.8v, v ih =2vatv cc =3v n low power dissipation: i cc =2 m a (max.) at t a =25 c n low noise: v olp = 0.3v (typ.) at v cc =3.3v n symmetrical output impedance: |i oh |=i ol = 4 ma (min) at v cc =3v n balanced propagation delays: t plh @ t phl n operating voltage range: v cc (opr) = 2v to 3.6v (1.2v data retention) n pin and function compatible with 74 series 125 n improved latch-up immunity description the 74lvx125 is a low voltage cmos quad bus buffers fabricated with sub-micron silicon gate and double-layer metal wiring c 2 mos technology. it is ideal for low power, battery operated and low noise 3.3v applications. this device requires the 3-state control input g to be set high to place the output into the high impedance state. power down protection is provided on all inputs and 0 to 7v can be accepted on inputs with no regard to the supply voltage. this device can be used to interface 5v to 3v. it combines high speed performance with the true cmos low power consumption. all inputs and outputs are equipped with protection circuits against static discharge, giving them 2kv esd immunity and transient excess voltage. 74lvx125 low voltage quad bus buffers (3-state) with 5v tolerant inputs pin connection and iec logic symbols order codes package tube t & r sop 74LVX125M 74LVX125Mtr tssop 74lvx125ttr tssop sop
74lvx125 2/9 input equivalent circuit pin description truth table x :don`t care z : high impedance absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied recommended operating conditions 1) truth table guaranteed: 1.2v to 3.6v 2) v in from 0.8v to 2.0v pin no symbol name and function 1, 4, 10, 13 1g to 4g output enable inputs 2, 5, 9, 12 1a to 4a data inputs 3, 6, 8, 11 1y to 4y data outputs 7 gnd ground (0v) 14 v cc positive supply voltage agy xhz lll hlh symbol parameter value unit v cc supply voltage -0.5 to +7.0 v v i dc input voltage -0.5 to +7.0 v v o dc output voltage -0.5 to v cc + 0.5 v i ik dc input diode current -20 ma i ok dc output diode current 20 ma i o dc output current 25 ma i cc or i gnd dc v cc or ground current 50 ma t stg storage temperature -65 to +150 c t l lead temperature (10 sec) 300 c symbol parameter value unit v cc supply voltage (note 1) 2 to 3.6 v v i input voltage 0 to 5.5 v v o output voltage 0 to v cc v t op operating temperature -55 to 125 c dt/dv input rise and fall time (note 2) (v cc = 3v) 0 to 100 ns/v
74lvx125 3/9 dc specifications dynamic switching characteristics 1) worst case package. 2) max number of outputs defined as (n). data inputs are driven 0v to 3.3v, (n-1) outputs switching and one output at gnd. 3) max number of data inputs (n) switching. (n-1) switching 0v to 3.3v. inputs under test switching: 3.3v to threshold (v ild ), 0v to threshold (v ihd ), f=1mhz. symbol parameter test condition value unit v cc (v) t a =25 c -40 to 85 c -55 to 125 c min. typ. max. min. max. min. max. v ih high level input voltage 2.0 1.5 1.5 1.5 v 3.0 2.0 2.0 2.0 3.6 2.4 2.4 2.4 v il low level input voltage 2.0 0.5 0.5 0.5 v 3.0 0.8 0.8 0.8 3.6 0.8 0.8 0.8 v oh high level output voltage 2.0 i o =-50 m a 1.9 2.0 1.9 1.9 v 3.0 i o =-50 m a 2.9 3.0 2.9 2.9 3.0 i o =-4 ma 2.58 2.48 2.4 v ol low level output voltage 2.0 i o =50 m a 0.0 0.1 0.1 0.1 v 3.0 i o =50 m a 0.0 0.1 0.1 0.1 3.0 i o =4 ma 0.36 0.44 0.55 i oz high impedance output leakage current 3.6 v i =v ih or v il v o =v cc or gnd 0.25 2.5 5 m a i i input leakage current 3.6 v i = 5.5v or gnd 0.1 1 1 m a i cc quiescent supply current 3.6 v i =v cc or gnd 22020 m a symbol parameter test condition value unit v cc (v) t a =25 c -40 to 85 c -55 to 125 c min. typ. max. min. max. min. max. v olp dynamic low voltage quiet output (note 1, 2) 3.3 c l =50pf 0.3 0.5 v v olv -0.5 -0.3 v ihd dynamic high voltage input (note 1, 3) 3.3 2.0 v ild dynamic low voltage input (note 1, 3) 3.3 0.8
74lvx125 4/9 ac electrical characteristics (input t r =t f = 3ns) 1) skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch- ing in the same direction, either high or low 2) parameter guaranteed by design (*) voltage range is 3.3v 0.3v capacitive characteristics 1) c pd is defined as the value of the ic's internal equivalent capacitance which is calculated from the operating current consumption without load. (refer to test circuit). average operating current can be obtained by the following equation. i cc(opr) =c pd xv cc xf in +i cc /4 (per circuit) symbol parameter test condition value unit v cc (v) c l (pf) t a =25 c -40 to 85 c -55 to 125 c min. typ. max. min. max. min. max. t plh t phl propagation delay time 2.7 15 5.8 10.1 1.0 13.5 1.0 14.5 ns 2.7 50 8.3 13.6 1.0 17.0 1.0 18.0 3.3 (*) 15 4.4 6.2 1.0 8.5 1.0 9.5 3.3 (*) 50 6.9 9.7 1.0 12.0 1.0 13.0 t pzl t pzh output enable time 2.7 15 5.3 9.3 1.0 12.5 1.0 13.5 ns 2.7 50 7.8 12.8 1.0 16.0 1.0 17.0 3.3 (*) 15 4.0 5.6 1.0 7.5 1.0 8.5 3.3 (*) 50 6.5 9.1 1.0 11.0 1.0 12.0 t plz t phz output disable time 2.7 50 10.0 15.7 1.0 19.0 1.0 20.0 ns 3.3 (*) 50 8.3 11.2 1.0 13.0 1.0 14.0 t oslh t oshl output to output skew time (note 1,2) 2.7 50 0.5 1.0 1.5 1.5 ns 3.3 (*) 50 0.5 1.0 1.5 1.5 symbol parameter test condition value unit v cc (v) t a =25 c -40 to 85 c -55 to 125 c min. typ. max. min. max. min. max. c in input capacitance 3.3 4101010pf c out output capacitance 3.3 6 pf c pd power dissipation capacitance (note 1) 3.3 14 pf
74lvx125 5/9 test circuit c l =15/50pf or equivalent (includes jig and probe capacitance) r l =r1=1k w or equivalent r t =z out of pulse generator (typically 50 w ) waveform 1 : propagation delays (f=1mhz; 50% duty cycle) test switch t plh ,t phl open t pzl ,t plz v cc t pzh ,t phz gnd
74lvx125 6/9 waveform 2 : output enable and disable time (f=1mhz; 50% duty cycle)
74lvx125 7/9 dim. mm. inch min. typ max. min. typ. max. a 1.75 0.068 a1 0.1 0.2 0.003 0.007 a2 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 c 0.5 0.019 c1 45 (typ.) d 8.55 8.75 0.336 0.344 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 7.62 0.300 f 3.8 4.0 0.149 0.157 g 4.6 5.3 0.181 0.208 l 0.5 1.27 0.019 0.050 m 0.68 0.026 s8 (max.) so-14 mechanical data po13g
74lvx125 8/9 dim. mm. inch min. typ max. min. typ. max. a 1.2 0.047 a1 0.05 0.15 0.002 0.004 0.006 a2 0.8 1 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 d 4.9 5 5.1 0.193 0.197 0.201 e 6.2 6.4 6.6 0.244 0.252 0.260 e1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 bsc 0.0256 bsc k0 8 0 8 l 0.45 0.60 0.75 0.018 0.024 0.030 tssop14 mechanical data c e b a2 a e1 d 1 pin 1 identification a1 l k e 0080337d
74lvx125 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringe ment of patents or other righ ts of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this pub lication are subject to change without notice. thi s pub lication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authori zed for use as critical components in life suppo rt devices or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2001 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco singapore - spain - sweden - swit zerland - united kingdom ? http://w ww.st.com 9/9
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